FAIRDO BG example 3.1.1.cellml

Here we show an electrical circuit with static storage (capacitor C), dynamic storage (inductor L) and dissipation (resistor R). vein and veout are the input and output fluxes (electrical currents), respectively. veC, veR and veL are the currents flowing through capacitor C, resistor R and inductor L, respectively, and ueC, ueR and ueL are the electrical potentials across them. Superscript ‘e’ indicates that the variables are electrical quantities; subscripts indicate the location in the circuit for each quantity.

Schematic and bond graph of the model

A simple electrical circuit (a) with its representation by a bond graph (b). 0:nodes for an electrical network are physical locations where the flows (electrical currents) are balanced, while 1:nodes represent circuits around which the potentials sum to zero. vein and veout are boundary conditions.

The Views Available menu to the right provides various options to explore this model here in the Physiome Model Repository. Of particular interest is the Launch with OpenCOR menu item, which will load the simulation experiment shown below directly into the OpenCOR desktop application.

Simulation results and model definition.

Showing the result of running this simulation alongside the model definition.